翻訳と辞書 Words near each other ・ Carry the Ghost ・ Carry the Kettle Nakoda First Nation ・ Carry the Meek ・ Carry the Rainbow on Your Shoulders ・ Carry the Wounded ・ Carry the Zero ・ Carry Us Now ・ Carry van Bruggen ・ Carry You ・ Carry You Home ・ Carry-le-Rouet ・ Carry-lookahead adder ・ Carry-over motions (UK Parliament) ・ Carry-save adder ・ Carry-select adder ・ Carry-skip adder ・ Carryall ・ Carryall Township, Paulding County, Ohio ・ Carrybridge ・ Carryduff ・ Carryduff River ・ Carryer Glacier ・ Carryin' On ・ Carryin' On with Johnny Cash and June Carter ・ Carrying (basketball) ・ Carrying a Torch ・ Carrying capacity ・ Carrying cost ・ Carrying On ・ Carrying on the head Dictionary Lists mini英和辞書 mini和英辞書 Webster 1913 Latin-English FOLDOC Wikipedia English ウィキペディア

翻訳と辞書　辞書検索 [ 開発暫定版 ] スポンサード リンク Carry-skip adder ： ウィキペディア英語版 Carry-skip adder A carry-skip adder (also known as a carry-bypass adder) is an adder implementation that improves on the delay of a ripple-carry adder with little effort compared to other adders. The improvement of the worst-case delay is achieved by using several carry-skip adders to form a block-carry-skip adder. ==Single carry-skip adder== The worst case for a simple one level carry-ripple-adder occurs, when the propagate-condition〔 〕 is true for each digit pair $(a\_i,\; b\_i)$. Then the carry-in ripples through the $n$-bit adder and appears as the carry-out after $\backslash tau\_(n)\; \backslash approx\; n\; \backslash cdot\; \backslash tau\_$. For each operand input bit pair $(a\_i,b\_i)$ the propagate-conditions $p\_i\; =\; a\_i\; \backslash oplus\; b\_i$ are determined using an XOR-Gate (see ). When all propagate-conditions are ''true'', then the carry-in bit $c\_0$ determines the carry-out bit. The ''n''-bit-carry-skip adder consists of a ''n''-bit-carry-ripple-chain, a ''n''-input AND-gate and one multiplexer. Each propagate bit $p\_i$, that is provided by the carry-ripple-chain is connected to the ''n''-input AND-gate. The resulting bit is used as the select bit of a multiplexer that switches either the last carry-bit $c\_n$ or the carry-in $c\_0$ to the carry-out signal $c\_$. * $s\; =\; p\_\; \backslash wedge\; p\_\; \backslash wedge\; \backslash dots\; \backslash wedge\; p\_1\; \backslash wedge\; p\_0\; =\; p\_$ This greatly reduces the latency of the adder through its critical path, since the carry bit for each block can now "skip" over blocks with a ''group'' propagate signal set to logic 1 (as opposed to a long ripple-carry chain, which would require the carry to ripple through each bit in the adder). The number of inputs of the AND-gate is equal to the width of the adder. For a large width, this becomes impractical and leads to additional delays, because the AND-gate has to be built as a tree. A good width is achieved, when the sum-logic has the same depth like the ''n''-input AND-gate and the multiplexer. 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「Carry-skip adder」の詳細全文を読む スポンサード リンク 翻訳と辞書 : 翻訳のためのインターネットリソース Copyright(C) kotoba.ne.jp 1997-2016. All Rights Reserved.